Exemplary embodiments relate to a nonvolatile memory device and, more particularly, to a nonvolatile memory device configured to have an algorithm and pattern data for a self-test built therein, and a method of testing the same.
A nonvolatile memory device may have the advantages of random access memory (RAM), such as enabling the writing and erasure of data, and read only memory (ROM), such as retaining data even without the supply of power, and so has recently been widely used for the storage media of portable electronic devices, such as digital cameras, personal digital assistants (PDAs), and MP3 players.
The nonvolatile memory device may include a memory cell array, a row decoder, a page buffer unit, etc. The memory cell array may include a plurality of word lines elongated in rows, a plurality of bit lines elongated in columns, and a plurality of cell strings corresponding to the respective bit lines.
Memory cells have varying threshold voltages according to their program states. It is ideal that the memory cells have the same threshold voltage according to the state of data to be stored. However, when a program operation is actually performed on the memory cells, the threshold voltages of the memory cells may have probability distributions in some regions because of various external environments, such as the device characteristics and the coupling effect.
To check for a fail memory cell from among the memory cells of the memory device, a test method is used in which an external host is coupled to the memory device, patterns for a test are inputted using the host, and several pages of the memory cells are programmed and read using the test patterns.
Such a test method may be problematic in that it uses lots of resources, such as a host and coupling equipment, and is inefficient in terms of time and the cost of production because a memory device has to be coupled to an external host.